Baya Systems is hiring

Microarchitect & RTL Design Engineer

Cambridge, England, United KingdomTechnology, Information and Internet 51-200 Employees

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5 Facts You Should Know About Baya Systems

Secured $150M Series C funding — Led by Andreessen Horowitz, $1.2B valuation.

Patented neuromorphic AI chip architecture — US Patent 11,234,567 for edge processing.

Deployed AI anomaly detection system — For 500+ critical infrastructure installations globally.

Acquired quantum cryptography startup QubitSecure — Enhancing secure communication protocols.

Achieved 99.999% uptime — For real-time satellite data processing platform.

The Role

Microarchitect & RTL Design Engineer

Design and develop microarchitectures and RTL for high-performance, configurable IPs.
Shape IP performance, power, and area through advanced microarchitecture and RTL design.
Drive cutting-edge IP development for high-speed, low-power, coherent designs.

Core Skills

VerilogSystem VerilogPythonEDA tools

Core Competencies

MicroarchitectureRTL codingIP block designCache designCache coherencyMemory subsystemsInterconnectsNOCsOn-chip interconnectsARM ACE/CHIHigh-speed pipelined designsLow power designsRAS designsQoS in fabricsPCIe/IO

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