SiFive is hiring

Staff RTL Design Engineer - CPU Midcore
Cambridge, England, United KingdomSemiconductor Manufacturing 501-1000 Employees
Apply on SiFive Careers

5 Facts You Should Know About SiFive

1
RISC-V inventors founded SiFive — Spun out of UC Berkeley.
2
$2.5B+ valuation — Achieved in 2021 Series F round.
3
Google selected SiFive — For next-gen data center processor development.
4
Intel's Horse Creek platform — Features SiFive P550 RISC-V cores.
5
Qualcomm Snapdragon Wear — Powered by SiFive RISC-V cores.

The Role

Staff RTL Design Engineer - CPU Midcore
  • Architect and implement new features for industry-leading RISC-V CPU cores using Chisel.
  • Develop microarchitecture, integrate designs, and optimize for performance, power, and area goals.
  • Your designs will power next-gen AI, automotive, and mobile applications globally.

Core Skills

ChiselSystemVerilogRISC-VScalaGit

Core Competencies

MicroarchitectureRTL DesignCPU ArchitectureSoftware EngineeringASIC Verification

Apply for this role

Apply directly on the SiFive careers page. Opens in a new tab.

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